Synopsys has announced an integrated hybrid prototyping solution that combines its Virtualizer virtual prototyping and HAPS FPGA-based prototyping to accelerate the development of system-on-chip (SoC) hardware and software.
By using these, designers can start software development up to 12 months earlier in the design cycle, states the company. In addition, Synopsys’ hybrid prototyping solution enables designers to accelerate hardware/software integration and system validation, reducing the overall product design cycle. With high-performance models for ARM Cortex processors, ARM AMBA protocol-based transactors, and DesignWare IP, developers can easily partition their ARM processor-based designs into virtual and FPGA-based prototypes as best suited to their design requirements.
Chris Rommel, vice president, embedded software and hardware, of VDC Research, said: “Synopsys’ ‘hybrid’ approach addresses many of the limitations of standalone SoC prototyping methods by allowing developers to freely mix pre-RTL transaction-level models with RTL that already exists or is being created, giving design teams a significant head start.”
Synopsys
